Control apparatus



Nov. 3, 1964 B. DOYLE CONTROL APPARATUS Filed April 25. 1960 ,2! 2s INPUT snsmu. SOURCE SIGN CONTROL 25 SOURCE J INVENTOR BARRE TT D OYLE ATTORNEY United States Patent Ofiice Patented Nov. 3, 1964 This invention relates to electronic control apparatus and more particularly to a novel transistorized gate circuit.

It is an object of this invention to provide a gate circuit that has dual output channels.

Another object of this invention is to provide a gate circuit wherein the input signal appears at either one output channel or the other, depending upon the polarity of a gate signal.

A further object of this invention is to provide a gate circuit wherein the output is zero when the gate control signal is zero.

These and other objects of my invention become apparent to those skilled in the art upon consideration of the accompanying specification, claims, and drawing of which the single figure is a schematic diagram of an embodiment of this invention.

Referring to the drawing, there is shown an input signal source 20 having a terminal 21 and a terminal 22, and a trigger, gate, or sign control input source 23, having a terminal 24 and a terminal 25. Terminal 21, of input signal source 26, is connected by means of a conductor 26 to the base 28 of a transistor 27 also having a collector 29 and an emitter 30. Terminal 22, of the input signal source 2t), is connected to a common conductor, in this case, ground. Collector 29, of transistor 27, is connected by means of a conductor 31 to a terminal 32 of a source of energizing potential 33 also having terminals 34 and 35. Emitter 30, of transistor 27, is connected directly to a collector 37 of a transistor 36 which also has a base 33 and an emitter 39. Emitter 39, of transistor 36, is connected by means of a resistor 40 to a common conductor, in this case, ground. Emitter 39 is further connected by means of capacitor 41 to an output terminal 42. Transistors 27 and 36 act as a current control, gate, or switch device which when conducting couples the signal from input signal source 29 to output terminal 42.

Terminal 21, of input signal source 20, is further connected by means of a conductor 43 to a base 45 of a transistor 44 also having a collector 46 and an emitter 47. Collector 46, of transistor 44, is connected by means of a conductor 50 to terminal 32 of potential source 33. Emitter 47 is directly connected to a collector 52. of a transistor 51 having a base 53 and an emitter 54. Emitter 54, of transistor 51, is connected by means of a resistor 55 to ground, and by means of a capacitor 56 to an output terminal 57. Transistors 44 and 51 also act as a current control, gate or switch device which, when conducting, couples the signal from input signal source 20 to output terminal 57. I

Terminal 24 of sign control source 23 is connected by means of a resistor 63 to a base 65 of a transistor 64 having a collector 66 and an emitter 67. Terminal 25 of tential source 33 is grounded.

-nal 42. l

Base 38, of transistor 36, is connected by means of a resistor 71 to the collector 66 of transistor 64.

Terminal 24, of sign control source 23, is further connected by means of a resistor 72 to thebase 53 of transistor 51.

Operation The gating circuit of the drawing comprises, in a broad sense, a means for switching an input signal to either of two outputs, depending upon the polarity of a control signal.

In considering the specific operation of the circuit of the drawing, assume that initially there is no output from the sign control source 23, and that a series of negative pulses are appearing at the output of the input signal source 20. The base of transistor 64 will be negative with respect to the emitter 67 since there is no output from the sign control source 23 and emitter 67 is connected through resistor to the positive terminal 35 of potential source 33. With the emitter of transistor 64 positive with respect to the base there will be a base current flow from terminal 35 of potential source 33 through resistor 70, emitter 67 to base 65 of transistor 64, resistor 68, and ground to terminal 34 of potential source 33. This emitter to base current flow will bias transistor 64 to its on or conducting state. With transistor 64 in its on state there will be a further current flow from terminal 35 of potential source 33, through resistor 70, emitter 67 to collector 66 of transistor 64, and resistor 69, to terminal 32 of potential source 33. Resistors 69 and 70 are so chosen so that when transistor 64 is conducting there will be a positive voltage at the collector 66. This positive voltage is coupled by means of resistor 71, to the base 38 of transistor 36. 'This positive voltage on the base of transistor 36 biases the transistor to its oil or non-conducting state. The emitter to base current flow of transistor 64 through resistor 68 develops a positive voltage on the base 65 of transistor 64, This positive voltage is coupled by means of resistors 63 and 72 to the base 53 of transistor 51 biasing transistor 51 to its cit or non-conducting state. e

The negative pulses from the input signal source 20 are applied, by means of conductors 26 and 43, to the bases 28 and 45 of transistors 27 and 44, respectively. These negative pulses tend to turn transistors 27 and 44 to their on or conducting states. and 51 are both in their non-conducting states, the emitter circuits of both transistors 27 and 44 are open and there fore neither transistor 27 nor 44 can conduct.

It can be seen from the above description that when the output from sign control source 23 is zero, transistor 64 is conducting while transistors 27, 36, 44 and 51 are shut off. It can further be seen that since transistors 27, 36, 44 and 51 are ofiff there will be no output signal at either terminal 42 or 57.

Assume now that a negative voltage appears at the output terminal 24 of sign control source 23. This negative voltage iscoupled by means of resistor 63t0 the base 65 of transistor 64. This negative voltage on the base of transistor 64has little eliect on the operation of the circuit, since thisv transistor is already conducting. As explained above, when transistor 64 conducts a posi tive voltage is. coupled by means of resistor 71 to the base 38 of transistor 36 which biases this transistor in its off state. Therefore we have no output at termi- 'The negative signal from sign control source 23 is However, since transistors 36 further connected by means of resistor 72 to the base 53 of transistor 51. This negative voltage on the base of transistor 51 produces an emitter to base current flow in this transistor. The path for this current flow is from the ground terminal of the sign control source 23, through resistor 55, emitter 54 to base 53 of transistor 51, resistor 72, to terminal 24 of the sign control source 23. This emitter to base current flow biases transistor 51 to its on state.

Since transistor 51 is in a conducting state, the negative pulses applied to the base of transistor 44 from the input signal source will produce an emitter to base current flow in transistor 44. The path of this current flow is from the grounded terminal 22 of the input signal source 20, through resistor 55, emitter 54 to collector 52 of transistor 51, emitter 47 to base 45 of transistor 44, conductor 43, and conductor 26 to terminal 21 of the input signal source 20. This base current flow in transistor 44 will switch this transistor to its on state. When transistor 44 is on, current will also flow from grounded terminal 34 of potential source 33 through resistor 55, emitter 54 to collector 52 of transistor 51, emitter 47 to collector 46 of transistor 44, and conductor to terminal 32 of potential source 33. This larger collector current flow in transistor 44 is controlled by the magnitude of the negative signal applied to the base 45 of this transistor. As this pulse varies from zero to some negative peak value the current through transistors 44 and 51 increases. This increased transistor flow develops a negative pulse across resistor which is coupled by means of capacitor 56 to output terminal 57. From the above discussion it can be seen that when a negative voltage appears at terminal 24 of the sign control source 23 that the negative pulses from the input signal source are coupled through transistors 44 and 51 to output terminal 57.

Assume now that a positive voltage appears at terminal 24 of sign control source 23. This positive voltage will be coupled by means of resistor 72 to the base 53 of transistor 51 and will return transistor 51 to its off state. Since transistor 51 is again in its non-conducting state, transistor 44 will also return to its non-conducting state due to the fact that its emitter circuit is again opened. Since both transistors 44 and 51 are in their ofi state, there will no longer be an output signal at terminal 57.

The positive voltage of terminal 24 of sign control source 23 is also coupled by means of resistor 63 to the base of transistor 64. The positive voltage on the base 65 of transistor 64 is larger than the positive voltage on the emitter 67 and hence transistor 64 will be driven into cut-off. When transistor 64 is cut off there will be no current flow through resistor 69 and therefore collector 66 of transistor 64 will be at approximately the same potential as terminal 32 of potential source 33. This negative voltage on collector 66 will be coupled by means of resistor 71 to the base 38 of transistor 36 and will bias transistor 36 to its conducting state.

Since transistor 36 is now conducting, the negative pulses from the input signal source 20 applied to the base 28 of transistor 27 Will produce an emitter to base current flow in this transistor. The path of this current flow is from ground terminal 22 of input signal source 20 through resistor 40, emitter 39 to collector 37 of transistor 36, emitter 30 to base 28 of transistor 27, and conductor 26 to terminal 21 of the input signal source 20. This emitter to base current flow in transistor 27 biases this transistor to its conducting state. When transistor 27 is on, there will be a current flow from ground terminal 34 of potential source, 33 through resistor 40, emitter 39 to collector 37 of transistor 36, emitter 39 to collector 29 of transistor 27, and conductor 31 to terminal 32 of potential source 33. This larger collector current flow of transistor 27 is controlled by the magnitude of the negative pulses applied to the base 28 of transistor 27 from the input signal source 29. As the current flow through transistors 36 and 27 varies, a negative pulse will be developed across resistor 40 and this negative pulse will be coupled by means of capacitor 41 to output terminal 42. It can be seen that when the output voltage at terminal 24 of sign control source 23 is positive the negative pulses from the input signal source 21 will be coupled by means of transistors 27 and 36 to the output terminal 42.

In summarizing the operation of this circuit, it can be seen that when the output of the sign control source is positive the input signal is coupled by means of transistors 27 and 36, to output terminal 42. When the output from the sign control source is negative, the signal from the input signal source is coupled by means of transistors 44 and 51 to output terminal 57 and when the output from the sign control source is zero there will be no output at either terminal 42 or 57.

It is to be understood that while I have shown a specific embodiment of my invention, this is for the purpose of illustration only and that my invention is to be limited solely by the scope of the appended claims.

I claim as my invention:

1. Control apparatus of the class described comprising: first, second, third, fourth and fifth transistors each having collector, base and emitter electrodes; a source of input signals; circuit means connecting said input signal source to the base electrodes of said first and second transistors; means connecting the emitter electrodes of said first and second transistors to the collector electrodes of said third and fourth transistors; a source of energizing potential having first, second and third terminals; means connecting the collector electrodes of said first, second, and fifth transistors to the first terminal of said potential source; circuit means connecting the second terminal of said potential source to a common conductor; first impedance means connecting the base electrode of said third transistor to the collector electrode of said fifth transistor; second impedance means connecting the emitter electrode of said third transistor to said common conductor; third impedance means connecting the emitter elec trode of said fourth transistor to said common conductor; first and second outputs; means connecting said first out put to the emitter of said third transistor; means connect ing said second output to the emitter of said fourth tram sistor; fourth impedance means connecting the base electrode of said fourth transistor to the base electrode of said fifth transistor; means connecting the emitter electrode of said fifth transistor to the third terminal of said potential source; a source of reversible polarity gate signals; and means connecting said gate signals to the base electrode of said fifth transistor.

2. Control apparatus of the class described comprising: first and second current control means each having input, output, and control electrodes; a source of input signals; circuit means connecting said signal source to the input terminals of said first and second current control means; gating means having input and output terminals; means connecting the output terminals of said gate means to the control terminals of said first and second current control means; a source of first polarity, second polarity and zero gate signals; and means connecting said source of gating signals to the input of said gate means, so that said gate means controls the conduction of said first and second current control means and thereby produces an output signal at the output of said first current control means when said gating signal is of said first polarity, said second current control means when said gating signal is of .said second polarity, and no output when said gating signal is zero.

3. Control apparatus of the class described comprising: switch means having input, control, and first and second output terminals; gate means having input and output terminals; a source of input signals connected to the input terminal of said switch means; a source of gate signals of a first sense, a second sense or zero connected to the input terminal of said gate means; and circuit means connecting the output terminals of said gate means to the control terminals of said switch means, so that said input signal will appear at the first output terminals of said switch means when said gate signal is of said first sense, at the second output terminals when said gate signal is of said second sense, and at neither output terminals when said gate signal is zero.

4. Control apparatus of the class described comprising: first and second current control means each having input, output, and control terminals; a source of input signals; circuit means connecting said source of input signal to the input terminals of said first and second current control means; a source of first polarity, second polarity and zero gate signals; and means connecting said source of gate signals to the control terminals of said first and second current control means, so that said input signal is effectively connected to the output terminals of said first current control means when said gate signal is of said first polarity, and to the output terminals of said second current control means when said gate signal is of said second polarity, and said input signal is effectively disconnected from both said first and second output terminals when said gate signal is zero.

5. Control apparatus of the class described comprising: first and second gate means each having input, output, and control terminals; a source of input signals; circuit means connecting said source of input signal to the input terminals of said first and second gate means; a source of first polarity, second polarity and zero control signals; and means connecting said source of control signals to the control terminals of said first and second gate means, so that when said control signals are of said first polarity, said first gate means is in a conducting state while said second gate means is in a non-conducting state, when said control signals are of said second polarity said second gate means is in a conducting state and said first gate means is in a non-conducting state and when said control signals are zero both said first and said second gate means are in a nonconducting state, the state of said first and second gate means determining the output at which said input signals will appear.

6. Control apparatus of the class described comprising: first, second, third and fourth current control means each having input, output and control electrodes; a source of input signals; circuit means connecting said input signal source to the control electrodes of said first and second current control means; means connecting the input electrodes of said first and second current control means to the output electrodes of said third and fourth current control means; a source of energizing potential having first and second terminals; means connecting the output electrodes of said first and second current control means transistors to the first terminal of said potential source; circuit means connecting the second terminal of said potential source to a common conductor; gate means having input and output electrodes; first impedance means connecting the control electrode of said third current control means to the output electrode of said gate means; second impedance means connecting the input electrode of said third current control means to said common conductor; third impedance means connecting the input electrode of said fourth current control means to said common conductor;

first and second outputs; means connecting said first output to the input electrode of said third current control means; means connecting said second output to the input electrodes of said fourth current control means; a source of reversible polarity gate signals; means connecting said gate signals to the input electrode of said gate means; and fourth impedance means connecting the control electrode of said fourth current control means to the input electrode of said fifth transistor.

7. Control apparatus of the class described comprising: first, second, third, fourth and fifth current control means each having input, output and control electrodes; a source of input signals; circuit means connecting said input signal source to the control electrodes of said first and second current control means; means connecting the input electrodes of said first and second current control means to the output electrodes of said third and fourth current control means; a source of energizing potential having first, second and third terminals; means connecting the output electrodes of said first, second, and fifth current control means to the first terminal of said potential source; circuit means connecting the second terminal of said potential source to a common conductor; first impedance means connecting the control electrode of said third current control means to the output electrode of said fifth current control means; second impedance means connecting the input electrode of said third current control means to said common conductor; third impedance means connecting the input electrode of said fourth current control means to said common conductor; first and second outputs; means connecting said first output to the input electrode of said third current control means; means connecting said second output to the input electrode of said fourth current control means; fourth impedance means connecting the control electrode of said fourth current control means to the control electrode of said fifth current control means; means connecting the input electrode of said fifth current control means to the third terminal of said potential source; a source of reversible polarity gate signals; and means connecting said gate signals to the control electrode of said fifth current control means.

8. Control apparatus of the class described comprising: first switch means having input, control, and first and second output terminals; second switch means having input and output terminals; a source of input signals connected to the input terminals of said first switch means; a source of first polarity, second polarity and zero gate signals connected to the input terminal of said second switch means; and circuit means connecting the output terminal of said second switch means to the control terminal of said first switch means, so that said input signal will appear at the first output terminals of said first switch means when said gate signal is of said first polarity, at the second output terminals of said first switch means when said gate signal is of said second polarity and at neither output terminals of said first switch means when said gate signal is zero.

9. Control apparatus of the class described comprising: first and second current control means each having input, output, and control terminals; a source of input signals; circuit means connecting said source of input signal to the input terminals of said first and second current control means; switch means having input and output terminals; means connecting the output terminals of said switch means to the control terminals of said first current control means; a'source of first polarity, second polarity and zero gate signals; and means connecting said source of gate signals to the control terminals of said second current control means, and to the input terminals of said switch means, so that said input signal appears at the output terminals of said first current control means when said gate signal is of said first polarity, at the output terminals of said second current control means when said gate signal is of said second polarity, and at neither output terminals when said gate signal is zero.

10. Apparatus of the class described comprising: first and second switch means each having input, output and control terminals, and being operable to a conducting or non-conducting state; a source of input signals connected to the input terminals of the said first and second switch means; third switch means having input and output terminals; means connecting the output terminal of said third switch means to the control terminal of said first switch means; a source of first polarity, second polarity and zero 7 a said gate signals are of said first polarity said first switch state of said first and second switch means determining means will be in its conducting state while said second at which output the signals from said input signal source switch means will be in its non-conducting state, when will appear.

said gate signals are of said second polarity said second q Ref rences Cited in the file of th' atent switch means W111 be in its conducting state Whne said 5 e is p first switch means will be in its non-conducting state and UNITED STATES PATENTS when said gate signals are zero both said first and said 2,396,395 Smith et al. Mar. 12, 1946 second switch means are in a non-conducting state, the 2,864,961 Lohman et a1. Dec. 16, 1958 

2. CONTROL APPARATUS OF THE CLASS DESCRIBED COMPRISING: FIRST AND SECOND CURRENT CONTROL MEANS EACH HAVING INPUT, OUTPUT, AND CONTROL ELECTRODES; A SOURCE OF INPUT SIGNALS; CIRCUIT MEANS CONNECTING SAID SIGNAL SOURCE TO THE INPUT TERMINALS OF SAID FIRST AND SECOND CURRENT CONTROL MEANS; GATING MEANS HAVING INPUT AND OUTPUT TERMINALS; MEANS CONNECTING THE OUTPUT TERMINALS OF SAID GATE MEANS TO THE CONTROL TERMINALS OF SAID FIRST AND SECOND CURRENT CONTROL MEANS; A SOURCE OF FIRST POLARITY, SECOND POLARITY AND ZERO GATE SIGNALS; AND MEANS CONNECTING SAID SOURCE OF GATING SIGNALS TO THE INPUT OF SAID GATE MEANS, SO THAT SAID GATE MEANS CONTROLS THE CONDUCTION OF SAID FIRST AND SECOND CURRENT CONTROL MEANS AND THEREBY PRODUCES AN OUTPUT SIGNAL AT THE OUTPUT OF SAID FIRST CURRENT CONTROL MEANS WHEN SAID GATING SIGNAL IS OF SAID FIRST POLARITY, SAID SECOND CURRENT CONTROL MEANS WHEN SAID GATING SIGNAL IS OF SAID SECOND POLARITY, AND NO OUTPUT WHEN SAID GATING SIGNAL IS ZERO. 